Yeah but RPi SoC is apparently lacking in PCIe lanes. I think they need a different SoC so they can finally have ethernet/storage/usb controller on the PCIe bus.
Please correct me if I’m wrong but no RaspPi has a PCIe interface, yet. From the embedded side of things, I would expect that to be a whole Pi generation out. Even then, I’m honestly not sure what the use case is, the Pi is doing amazing things with SPI and USB.
It's pretty awesome stuff, but what could be a real use of PCIe in Raspberry Pi except for experimenting ? Just curious, but most things I can think of are probably going to bottleneck...
You can certainly use the PCIe support on the RPi 4 CM with a SATA controller. Either with a PCIe SATA card on the IO board you linked, or by building a custom board.
It's definitely possible, just need to expost the PCIe lanes in a sensible way (this has been rare to see on ARM-based machines so far) and have PCIe device manufacturers distribute drivers for ARM macOS.
Have you seen the compute module though? It exposes a PCIe slot via a separate I/O board. At first I assumed there was some free lanes, but now I see it doesn't exposea usb 3.0 ports, only 2.0.
Still, I would rather have a dedicated bus for storage with usb 2.0 rather than usb 3.0
Depending on what your idea of a computer is, the reference carrier board for the Raspberry Pi 4 compute module has a pcie x1 slot. The jetson family of developer kits have pcie connectivity. The 4GB Jetson Nano has an m.2 E key slot which has a pcie x1 lane, with the right adapter available from Amazon or alibaba or where ever, you can plug in a pcie card of your choice. The Xavier NX has two m.2 slots, which again, with adapters can connect to pcie cards. Though I’m not sure of the use case as the jetson line has fairly capable gpus built in.
I think that these days there's a lot of convergence going on - everything is essentially serdes in some form - some chips just have N serdes lanes and let you config them for PCIe/ether/data/USB/etc as you need them, much as more traditional SoCs config GPIOs between a bunch of other functions like uarts/spi/i2c/i2s/pcm/...
That's probably the way to think about it. PCIe devices communicate point-to-point over dual-simplex serial connections. If you have something like a Raspberry Pi CM4, which only has a single PCIe lane, then there's going to be a PCIe switch.
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