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Thanks for all the work. That was an amazing read.

I've always wondered how people map chip-die photos into something like this: http://chip-architect.com/news/2007_02_19_Various_Images.htm...

or this: http://chip-architect.com/news/2003_09_21_Detailed_Architect...

I can see how figuring out the cache and the internal buses might be doable, but the rest... Any insights?



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Has anybody done any work on mapping die shots onto the microarchitecture features?

The only thing I've found is work by this guy (about a decade old now): http://chip-architect.com/news/2003_09_21_Detailed_Architect...

Would be very interested in seeing more on these lines.


It's common to see die photos on Wikipedia [0, for example] and tech twitter. I understand the basics of processors (I built a basic one in school using Logisim and I've made a few emulators since then). But die photos don't really mean anything to me. I don't know if they even mean anything to other hardware engineers who didn't build the particular chip.

But for fear of missing out I'm wondering if it's possible (and if there's a good way) to learn to read die photos.

Any suggestions?

[0] https://en.wikipedia.org/wiki/MOS_Technology_6502#Detailed_behavior


With some images of each (which I can't judge for accuracy): http://semiaccurate.com/2011/08/18/intel-moves-transistors-f...

That's a great graphic! I see a few more from around 2003 on http://chip-architect.com/, do you know of anyone who's doing modern chips (x86 or ARM) this way?

Here you go. This one combines a high-res die shot with AMD's die breakdown of Zen 2.

You'll notice that I understated things significantly. Not only is decoder bigger than the integer ALUs, but it's more than 2x as big if you don't include the uop cache and around 3x as big if you do! It dwarfs almost every other part of the die except caches and the beast that is load/store

https://forums.anandtech.com/threads/annotated-hi-res-core-d...

Original slides.

https://forums.anandtech.com/threads/amds-efforts-involved-i...


Author here: I'm sure there are people on HN who have experience with modern chip layout, and I'd be thrilled if you can explain more about the transistor structures and so forth. I mostly look at chips from the 1970s and 80s, and a lot has changed since then :-)

Can't let a post like this go by without name-checking a couple of other sites:

Visual 6502 for taking such photos and then emulating, or should I say simulating, the cpu from the images - in JavaScript: http://visual6502.org/

Chipworks for commercial silicon analysis of big modern system on chips (source of some photos of recent apple silicon): http://www.chipworks.com/blog/technologyblog/2013/01/21/the-...


Agreed. This is very fascinating stuff to help understand what's really happening at that low level in these new chips and how this can impact software performance, the intricate details of which are sometimes only sparsely available online and usually not as approachable.

They also had an excellent one posted just a few weeks ago on the Intel Skylake architecture in case you hadn't yet seen it: https://chipsandcheese.com/2022/10/14/skylake-intels-longest...


You've just inspired a dive into documentation. I do GPU architecture research and reading this was exciting. Thanks.

Also out of interest do you have a link to an x86 die breakdown that includes decoder and ALU area? Looking at wikichip for example they've got a breakdown for Ice Lake: https://en.wikichip.org/wiki/intel/microarchitectures/ice_la... but it doesn't get into that level of detail, a vague 'Execution units' that isn't even given bounds is the best you get and is likely an educated guess rather than definite knowledge of what that bit of die contains. Reverse engineering from die shots can do impressive things but certainly what you see in public never seems to get into that level of detail and would likely be significant effort without assistance from Intel.

The author mentions the Visual 6502 project in the credits section at the end of the page, which is (was) a long-running reverse-engineering effort to map the chip at the transistor level: http://visual6502.org/

That’s an impressive piece of work. I would love to know how far this is from the information in the actual internal documentation. It’s very nice to have some excitement about a mainstream CPU architecture again.

Agreed, I went through a similar flow.

Direct link to the image: https://upload.wikimedia.org/wikipedia/commons/thumb/e/ef/Pr...

Article: https://en.wikipedia.org/wiki/TOP500


When I was at Intel, I recall that in (SC5?) they had a lot of the processor design diagrams on the wall as art. They are beautiful.

Also, they turned the bad chips from fabs into keychains - with all the CPU Circuitry revealed behind a dollop of clear epoxy - had that as my keychain for nearly a decade.

Core memory is really cool - and just in case you like some of this https://www.reddit.com/r/cableporn/ is a good place...


Projects like this are a great way to appreciate how much can fit into an IC.

Reminds me of the Megaprocessor project.

https://www.megaprocessor.com/index.html


I'd like a better understanding of modern processor microarchitectures, i.e. what's happening inside the chip. What do you recommend I read? I'd like to be able to understand a diagram like: http://www.realworldtech.com/wp-content/uploads/2012/10/hasw...

Annnnnnnnd the hardware was neatly laid out on a graph on the readme. Did you comment before doing ANY reading? That's a feaux pah oh HN.

Cool! I’ll take the liberty to post the permalink: https://www.techspot.com/article/1840-how-cpus-are-designed-...

That's really neat! Was there ever public documentation on the microarchitecture of these chips? I seem to remember them from back in their day and it'd be neat to see how they worked.
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