> This tutorial will discuss advanced packaging technologies that enable performance and density improvements.
I'm interested in advanced packaging. Does anyone know anything about it? My impression is that BGA, MicroBGA, CSP, WLP, Flip-Chip are the evolutionary dead end of packaging, you can't really find a denser way to put a chip on the board. So instead, you put more things into the package or onto the interposer, and for the user, the new "module" can be used just like a chip, this is the System-in-Package approach, such as integrating the chiplet and RAM to a processor, or stacking multiple silicon dies on top of each other. This is my understanding, but is there anything new to see?
In my mind advanced packaging competes more directly with making circuit boards that have more chips on them than it does with making chips that have more elements on them either by making the chips bigger or the elements smaller.
This has lots of advantages. It removes the need for smaller and smaller chips, it spreads the heat out (a major limitation in electronics packaging today), and it adds a lot of new possibilities.
It's a giant pcb and ic combined, both custom to each other and the application.
Chiplets are super neat, I see a near future where we can get more standardized packaging and easier integration to drive the cost of developing custom ICs way down.
I really hope that over the next 5-10 years we can get some more advanced manufacturing like microvias, blind/buried vias and via in pad for PCBs at a lower cost to cut down the cost of iteration on hardware design.
Things like KiCad, FreePCB and Horizon EDA have really been crushing it from an EDA point of view from where it was even 3-5 years ago.
The only gripe I have with these packages is the library management, but that isn't really 100% their fault :(
Nearly every chip in there is a WLCSP (wafer level chip scale package). Seems like the industry is trending toward no package is the package. Also, it will be interesting to see if there are any fan-out packages, like eWLB. Several IDMs have started integrating several ICs horizontally--usually things like audio codecs or USB transceivers. With multi-die fan out, you save a lot of PCB real estate. In small form-factor devices like the iWatch, packaging is a huge differentiator.
Oh no, the packaging connections are (guessing) thousands of nanometres. Much easier to build, much cheaper. Also, the process of moving to multi-chip packages means the process yield for the chiplets is much higher. It's a bloody good idea :)
I am impressed by the fabrication technology for these heterogenous systems. It was already complex enough to fabricate a CPU, but chiplets require incredible precision for placing the die on the interposer wafer for soldering. And the coplanarity of the whole assembly is critical, else it will be impossible to effectively cool. It's incredible that any of it works.
That is exceptionally cool. They have taken existing best practices in semiconductor fabs and migrated them to an interesting place.
What is missing of course is what their feature sizes are and the part at the end where you cut the die and package it. It is those things that would define the set of things you could put on a single chip.
That's the way it's going. Discrete logic transistors fell out of use once integrated circuits became mainstream. Hand-solderable PCBs are next on the chopping block.
Consider chiplets. The initial impetus for them was to improve yields. With lithography development becoming increasingly expensive, packaging is looking like a much better target. This further unlocks options to integrate memory and accelerators like GPUs as chiplets on silicon.
At the same time, the high-speed digital world is bending over backwards to overcome the challenges of woven PCBs. Between chiplets and hand-solderable PCBs are some more attractive options to integrate bare dies on different substrates at smaller scales.
Power modules have completely eliminated packaging altogether. The outsides are ferrite material, which also serves as the substrate, heat spreader, and EMI shield. The only thing holding them back is the PCB. The polymer matrix is a heat insulator, and the distance to the next part requires many capacitors. Even logic chip makers are doing thin-film deposition of ferrites on chips.
For a relatively low-spec gadget like a phone, why wouldn't you integrate all the electronics into one component? It's the economically viable thing to do for now. Then there's only one more step before the whole product is fused.
People take PCBs for granted, but they only exist to connect components that people wish were already connected.
Packaging will dominate silicon costs? I see plenty of silicon chips directly soldered onto PCB's for the smallest and cheapest applications, i.e. no packaging whatsoever.
It is an interesting technology. It is basically a packaging innovation, sounds pretty boring I guess, but larger chips have a super-linearly bad effect on yield, so breaking up the design into chiplets is very nice.
I wonder if anyone knows of a good place to look up Intel vs TSMC yield numbers or defect density?
They may be making a finer point here, I’m not an expert on packaging, but generally speaking there are packaging processes that support using only “known good die”. You still have the issue of testing the final integrated product, so the packaging process itself needs to have high yield.
For more info check out Dylan Patel’s series on advanced packaging:
I think the embedded wafer level or "panel" level packaging technologies are the mid-ground. These technologies don't use expensive silicon, and instead surround the die with cheaper epoxy. Then the interconnects are built on top of that, and can connect multiple die together. Yield and interconnect pitch are the big issues here though, and that's why I think you're right, that we will see SoCs or mobile systems first, not whole motherboards.
With that said, some of these technologies can have a layer of surface mount pads on top. So you have a substrate of epoxy with all your chips and interconnects embedded in it, and then surface mount parts on top. For example, passives, connectors, etc. It would look almost like a motherboard, but with all the chips inside. Of course, for cost and yield reasons, this will be for mobile devices only at first.
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